LLVM 2.9 buggy for the task…

And now, finally funny things might start. I’ve little bit hacked GHC HEAD to support -fllvm even on unregisterised build and so I’m able to try to compile some as simple as possible examples. My testing code is this naive fib example:

 module Main where

fib :: Integer -> Integer
 fib 0 = 0
 fib 1 = 1
 fib n = fib (n - 1) + fib (n - 2)

main = do putStrLn (show (fib 7))
 

The way I compile this is:

 /home/karel/vcs/ghc/inplace/ghc-stage1 -v -fllvm -c fib.hs

To my delight this runs well on x86 and to my bad surprise this crashes on ARM with:

*** CodeOutput:
 *** LLVM Optimiser:
 opt /tmp/ghc4275_0/ghc4275_0.ll -o /tmp/ghc4275_0/ghc4275_0.bc -mem2reg
 *** LLVM Compiler:
 llc -O1 -relocation-model=static /tmp/ghc4275_0/ghc4275_0.bc -o /tmp/ghc4275_0/ghc4275_0.lm_s
 UNREACHABLE executed!
 Stack dump:
 0. Program arguments: llc -O1 -relocation-model=static /tmp/ghc4275_0/ghc4275_0.bc -o /tmp/ghc4275_0/ghc4275_0.lm_s
 1. Running pass 'Function Pass Manager' on module '/tmp/ghc4275_0/ghc4275_0.bc'.
 2. Running pass 'ARM Instruction Selection' on function '@sau_entry'

so I’ve started to experiment with various optimize options and such, but still LLVM ARM codegen crashes on this. Finally I’ve attempted to generate ARM code on x86 machine with manual execution of llc compiler:


$ llc -march=arm -O1 -relocation-model=static ghc5638_0.bc -o ghc5638_0.lm_s
 UNREACHABLE executed!
 0 llc 0x08fd21af PrintStackTrace(void*) + 41
 Stack dump:
 0. Program arguments: llc -march=arm -O1 -relocation-model=static ghc5638_0.bc -o ghc5638_0.lm_s
 1. Running pass 'Function Pass Manager' on module 'ghc5638_0.bc'.
 2. Running pass 'ARM Instruction Selection' on function '@sav_entry'
 Abort (core dumped)

So this looks like ARM codegen is also broken on x86 not only on ARM! And to verify this idea, I’ve run following on ARM (generating code to x86):


llc -march=x86 -O1 -relocation-model=static ghc5638_0.bc -o ghc5638_0.lm_s

and to my surprise this runs well!

Conclusion: LLVM 2.9 is not well suited for ARM code generation at least when input is LLVM assembler file produced by GHC. Anyway, this is not the end of the show! A minute after this I’ve also tested LLVM HEAD compiled and run on x86 and to my surprise it compiles into ARM assembler well, so there is still the way to go and a hope to achieve the task…

Advertisements

Leave a Reply

Fill in your details below or click an icon to log in:

WordPress.com Logo

You are commenting using your WordPress.com account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Google+ photo

You are commenting using your Google+ account. Log Out / Change )

Connecting to %s