Milestone (3) has been reached. This means I’m running ghc HEAD (from 1st June + 3 my patches) compiled with C backend and its testsuite compiled with both C and LLVM backend for comparison. For better milestones definitions see document here. For the build, based on experiences with several broken previous builds or testsuite runs I’ve installed LLVM HEAD (2.9 was buggy as described here). Also I’ve needed to install binutils 2.21 since ubuntu provided binutils 2.20.1 GNU assembler cannot recognize some of ARM instructions (VFPv3/NEON). The symptoms look like:
/tmp/ghc16874_0/ghc16874_0.s:1010:0: Error: bad instruction `vmrs apsr_nzcv,fpscr'
Anyway, after 20 hours of GHC compilation and after 10 hours of testsuite run I got following results:
OVERALL SUMMARY for test run started at Wed Jun 22 14:17:06 CST 2011 2802 total tests, which gave rise to 7180 test cases, of which 0 caused framework failures 3289 were skipped 3718 expected passes 102 expected failures 0 unexpected passes 71 unexpected failures Unexpected failures: 2014(normal) 2228(normal) 2636(normal) 3171(normal) 3424(normal) 3586(normal) 3890(normal) 4850(normal) T2615(llvm,normal) T3016(llvm,normal) T3736(normal) T3807(normal) T3953(normal) T4801(normal) T4891(normal) T4978(normal) T706(normal) ann01(llvm,normal) annfail03(normal) annfail04(normal) annfail05(normal) annfail06(normal) annfail07(normal) annfail08(normal) annfail09(normal) annfail10(normal) annfail12(normal) annrun01(llvm,normal) apirecomp001(normal) barton-mangler-bug(llvm) cabal04(normal) dph-diophantine-opt(normal) dph-dotp-fast(normal) dph-dotp-opt(normal) dph-primespj-opt(normal) dph-quickhull-opt(normal) dph-sumnats(normal) dph-words-opt(normal) ghc-e001(normal) ghc-e002(normal) ghc-e003(normal) ghc-e004(normal) ghc-e005(normal) ghci024(normal) ghci037(normal) ghcpkg05(normal) hpc_ghc_ghci(normal) jmp_tbl(llvm) joao-circular(llvm) layout007(normal) massive_array(llvm,normal) qq001(normal) qq002(normal) qq003(normal) qq004(normal) qq007(llvm,normal) qq008(llvm,normal) recomp007(normal) tcrun006(llvm,normal) tcrun007(llvm,normal) tcrun029(llvm,normal)
Which looks IMHO quite nice for unregisterised build. Anyway, testcases where only LLVM fails are barton-mangler-bug which fails due to compilation timeout, jmp_tbl which fails due to -fPIC flag and GHC complains that -fPIC and -fllvm are in conflicts. It’s a wonder to me that this test does not fail with C backend as this probably neither support -fPIC correctly (unregisterised build!), joao-circular fails due to compilation timeout. I’ve run testsuite with:
make WAY="normal llvm" EXTRA_HC_OPTS="-opta=-march=armv7a" TIMEOUT=1500
if you wonder if I ever increased the timeout. I did and it solved a lot of other timeouts, but those two mentioned above was probably too long even for 25 minutes timeout value. Part of LLVM slowness here is clearly caused by the fact that I’m using debug+asserts build. LLVM project put a nice warning at the end of build compilation claiming that such build might be 10x slower than common release build. OK, it probably is. Also I’ve used -opta=-march=armv7a option to enforce invoked GNU assembler to recognize correctly ARM assembler produced by LLVM. If this option is omitted I got errors like:
=====> 2047(llvm) 449 of 2802 [0, 4, 0] cd ./rts && '/export/home/karel/vcs/ghc-src/ghc-arm-test-build-tree/inplace/bin/ghc-stage2' -fforce-re comp -dcore-lint -dcmm-lint -dno-debug-output -no-user-package-conf -rtsopts -opta=-march=armv7 -o 204 7 2047.hs -fllvm -package containers >2047.comp.stderr 2>&1 Compile failed (status 256) errors were: [1 of 1] Compiling Main ( 2047.hs, 2047.o ) /tmp/ghc12273_0/ghc12273_0.s: Assembler messages: /tmp/ghc12273_0/ghc12273_0.s:5947:0: Error: thumb conditional instruction should be in IT block -- `moveq r1,#1' /tmp/ghc12273_0/ghc12273_0.s:5969:0: Error: thumb conditional instruction should be in IT block -- `movlt r2,#1' /tmp/ghc12273_0/ghc12273_0.s:5988:0: Error: thumb conditional instruction should be in IT block -- `movlt r2,#1' /tmp/ghc12273_0/ghc12273_0.s:6005:0: Error: thumb conditional instruction should be in IT block -- `movlt r2,#1' /tmp/ghc12273_0/ghc12273_0.s:6070:0: Error: thumb conditional instruction should be in IT block -- `moveq r1,#0' /tmp/ghc12273_0/ghc12273_0.s:6071:0: Error: thumb conditional instruction should be in IT block -- `movne r1,#1' *** unexpected failure for 2047(llvm)